Viswateja Nemani
Product Management & Marketing-ASIC HW, AI & Software solutions|Stanford LEAD| Physical AI| Edge AI| ASIP Evangelist
A self-starting problem solver keen on building products that change the world. I love to focus on collaboration between customer and company to help come up with innovative solutions that ease their pain points.
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Leading cross-functional teams to navigate and overcome hurdles to deliver successful results. Skilled in Stakeholder management, Wireframing, PRDs, Negotiation, Technical Sales, CRM, and Management. Highlights • Product management certificate from Product school, class of 2019. • Azure Cloud certification. • Google Project Management Certificate. • Knowledge of Agile methodologies and Scrum processes. • Team player with Strong communication skills and the ability to translate technical lingo into simple concepts. • Quick learner with strong analytical & problem-solving skills. • Experience presenting papers/projects in technical symposiums. Represented Intel FPGA in SURGE 2018 to talk about “benefits of Parasitic Reduction”.
GTM Index
- MIPSJOB
- SMTS Solutions Architect -…2M
SMTS Solutions Architect - ASIP Custom Processors (Technical Marketing, Evangelism, GTM Strategy)
MIPS
https://mips.com/processor-solutions/asip-designer/
- SYNOPSYSJOB
- Sr Solutions Architect-ASI…1Y 3M
Sr Solutions Architect-ASIP Custom Processors (Business Development,GTM,Technical Marketing)
Synopsys Inc
https://www.synopsys.com/designware-ip/processor-solutions/asip-designer.html
- ACHRONIX SEMICONDUCTOR CORPORATIONJOB
- Product Mgr (Planning, Str…2Y 5M
Product Manager (Planning, Strategy, Marketing, Program management)-ASIC HW & AI Software solutions
Achronix Semiconductor Corporation
Forged a ~15M revenue path for the company by identifying opportunities in the low-end Efpga market. Convinced the C-level executives with relevant data from detailed market research and competitive analysis to invest in the project. Optimized license registration & and request processes, reducing the turnaround time by 10x and improving the user experience Spearheaded the SDK & driver development from 0->1 which helped secure design wins increasing revenue by >2M Designed A/B tests for a light version of SW which helped set our strategic direction & increase user adoption rates by 30% Pioneered an ecosystem for ML developers to map their models from ML frameworks like TensorFlow/PyTorch/ON…
- CLIOSOFTJOB
- Solutions Architect (Pre-s…2Y 3M
Solutions Architect (Pre-sales, Technical Marketing)
ClioSoft Inc.
• Acting as a pseudo Product Manager to release new features to our SaaS product (SOS). • Account management of key customers. • Experience managing both internal & external stakeholders to get them to focus on a common goal and accomplish it. • Release sign off lead for the AE team. • Identify potential new features. Create PRD & Specs for the engineering teams to develop these enhancements. • Collaborating with Cross functional teams like Engineering & Product teams to define new product features and flows, Marketing & Sales teams for pre-sales demo content. • Create, Manage and track tickets in the list. Used JIRA & Zendesk bug tracking systems • Created a notification tool for AE’s usin…
- INTEL CORPORATIONJOB
- CAD Eng (RC Extraction Lea…4Y 3M
CAD ENGINEER (RC Extraction Lead, Timing/STA, Physical Verification)
Intel Corporation
• Led the team through 3 successful tapeout cycles. • Well versed in ASIC & SOC development life cycle. • Present teams accomplishments to C-level executives. • Plan, assign & track the tasks and goals of all the cross-site team members and ensuring the deliverables are met. • Led the project planning and execution of Parasitic Extraction and Physical Verification flows and methodologies with focus on improving accuracy and execution efficiency for the 10nm series chips. • Interfacing with internal customers, EDA vendors and Foundry partners effectively. • Engaging in strategic roadmap development with key EDA vendors and other design stakeholders • Developing crystal clear documentation &…
- REAL INTENTJOB
- Product Eng5M
Product Engineer
Real Intent
Designing Test cases in Verilog and SystemVerilog for a 2-step compile procedure. Developed custom scripts in TCL to build a test suite for a new Parallel Regression QA system to integrate in a Jenkins Environment. Wrote more than 700 test cases for the Ascent Lint command options to Validate the tool and became familiar with the Ascent IIV Formal Verification methodology and Meridian CDC(Clock Domain Crossing) series of products. Bug Tracking using Bugzilla.
- NVIDIAJOB
- Tegra System Level Test In…5M
Tegra System Level Test Intern
NVIDIA
Correlating Production failure symptoms with “Real Life Android” symptoms on Tegra K1 Logan chips (Worked on T124 series, T132 series and on T210 series). Also received appreciation for developing PERL scripts to make the whole System Level Test (SLT) process automated for faster testing and validation of more number of chips in a short time span. Main concentration on finding CPU Vmin and GPU Vmin failures along with concentration on USB 2.0 and USB 3.0 failures. Android Debug Bridge and different Nvidia software were used to perform the Correlation of the chips. Parsing data from different files and storing them into specified file formats with the help of PERL scripts. Post-Silicon val…
- COGNIZANTJOB
- Eng TRAINEE6M
ENGINEER TRAINEE
Cognizant
Worked as an ORACLE Database Administrator And Linux Administrator performing day-day scheduling and maintenance activities
- INDIAN SPACE RESEARCH ORGANISATIONJOB
- PROJECT TRAINEE4M
PROJECT TRAINEE
Indian Space Research Organisation
WORKED AS AN INTERN LEARNING TO PERFORM THE TELEMETRY, TRACKING AND COMMAND OPERATIONS AT ISTRAC / ISRO
- LI2-INNOVATIONSJOB
- Design Eng2M
Design Engineer
li2-innovations
WORKED AS AN INTERN DESIGN ENGINEER DEVELOPING DIFFERENT KIND OF ROBOTS WORKING ON THE ARDUINO PLATFORM
- Job: MIPS — SMTS Solutions Architect - ASIP Custom Processors (Technical Marketing, Evangelism, GTM Strategy) · 2026-06 – present — https://mips.com/processor-solutions/asip-designer/
- Job: Synopsys Inc — Sr Solutions Architect-ASIP Custom Processors (Business Development,GTM,Technical Marketing) · 2025-02 – 2026-05 — https://www.synopsys.com/designware-ip/processor-solutions/asip-designer.html
- Job: Achronix Semiconductor Corporation — Product Manager (Planning, Strategy, Marketing, Program management)-ASIC HW & AI Software solutions · 2022-06 – 2024-11 — Forged a ~15M revenue path for the company by identifying opportunities in the low-end Efpga market. Convinced the C-level executives with relevant data from detailed market research and competitive analysis to invest in the project. Optimized license registration & and request processes, reducing the turnaround time by 10x and improving the user experience Spearheaded the SDK & driver development from 0->1 which helped secure design wins increasing revenue by >2M Designed A/B tests for a light version of SW which helped set our strategic direction & increase user adoption rates by 30% Pioneered an ecosystem for ML developers to map their models from ML frameworks like TensorFlow/PyTorch/ON…
- Job: ClioSoft Inc. — Solutions Architect (Pre-sales, Technical Marketing) · 2020-03 – 2022-06 — • Acting as a pseudo Product Manager to release new features to our SaaS product (SOS). • Account management of key customers. • Experience managing both internal & external stakeholders to get them to focus on a common goal and accomplish it. • Release sign off lead for the AE team. • Identify potential new features. Create PRD & Specs for the engineering teams to develop these enhancements. • Collaborating with Cross functional teams like Engineering & Product teams to define new product features and flows, Marketing & Sales teams for pre-sales demo content. • Create, Manage and track tickets in the list. Used JIRA & Zendesk bug tracking systems • Created a notification tool for AE’s usin…
- Job: Intel Corporation — CAD ENGINEER (RC Extraction Lead, Timing/STA, Physical Verification) · 2015-12 – 2020-03 — • Led the team through 3 successful tapeout cycles. • Well versed in ASIC & SOC development life cycle. • Present teams accomplishments to C-level executives. • Plan, assign & track the tasks and goals of all the cross-site team members and ensuring the deliverables are met. • Led the project planning and execution of Parasitic Extraction and Physical Verification flows and methodologies with focus on improving accuracy and execution efficiency for the 10nm series chips. • Interfacing with internal customers, EDA vendors and Foundry partners effectively. • Engaging in strategic roadmap development with key EDA vendors and other design stakeholders • Developing crystal clear documentation &…
- Job: Real Intent — Product Engineer · 2015-07 – 2015-12 — Designing Test cases in Verilog and SystemVerilog for a 2-step compile procedure. Developed custom scripts in TCL to build a test suite for a new Parallel Regression QA system to integrate in a Jenkins Environment. Wrote more than 700 test cases for the Ascent Lint command options to Validate the tool and became familiar with the Ascent IIV Formal Verification methodology and Meridian CDC(Clock Domain Crossing) series of products. Bug Tracking using Bugzilla.
- Job: NVIDIA — Tegra System Level Test Intern · 2014-07 – 2014-12 — Correlating Production failure symptoms with “Real Life Android” symptoms on Tegra K1 Logan chips (Worked on T124 series, T132 series and on T210 series). Also received appreciation for developing PERL scripts to make the whole System Level Test (SLT) process automated for faster testing and validation of more number of chips in a short time span. Main concentration on finding CPU Vmin and GPU Vmin failures along with concentration on USB 2.0 and USB 3.0 failures. Android Debug Bridge and different Nvidia software were used to perform the Correlation of the chips. Parsing data from different files and storing them into specified file formats with the help of PERL scripts. Post-Silicon val…
- Job: Cognizant — ENGINEER TRAINEE · 2012-12 – 2013-06 — Worked as an ORACLE Database Administrator And Linux Administrator performing day-day scheduling and maintenance activities
- Job: Indian Space Research Organisation — PROJECT TRAINEE · 2012-01 – 2012-05 — WORKED AS AN INTERN LEARNING TO PERFORM THE TELEMETRY, TRACKING AND COMMAND OPERATIONS AT ISTRAC / ISRO
- Job: li2-innovations — Design Engineer · 2011-09 – 2011-11 — WORKED AS AN INTERN DESIGN ENGINEER DEVELOPING DIFFERENT KIND OF ROBOTS WORKING ON THE ARDUINO PLATFORM
- School: Stanford University Graduate School of Business — LEAD Executive Education, Corporate innovation | Design Thinking | Organizational & Innovational Leadership
- School: Product School — Product Management Certificate, Product Management
- School: San Jose State University — Master's degree, ELECTRICAL ENGINEERING
- School: Visvesvaraya Technological University — Bachelor's degree, Electrical, Electronics and Communications Engineering
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