Rodrigo Fonseca Rocha Soares

Formal Verification Engineer | Software Engineer |

Location n/auniverse-v1 · gtme
NVIDIAex-Cadenceex-Jasper Design Automation

Company history

  1. CadenceSr. Principal Software Engineer - ChipStack R&D2025-11 – 2026-05 · 6 mo
  2. Jasper Design AutomationR&D Intern2014-03 – 2014-06 · 3 mo
  3. NVIDIASenior Formal Verification Engineer2026-05 – present · 3 mo
  4. Voa, Papagaio!Math Teacher [Volunteer]2025-03 – present · 1y 5mo
  5. CemigSubstation Designer2010-04 – 2011-07 · 1y 3mo
  6. CadencePrincipal Software Engineer - Jasper R&D2014-03 – 2025-06 · 11y 3mo
  7. JabilIndustrial Engineering Intern2009-02 – 2009-12 · 10 mo
  8. Universidade Federal de Minas GeraisUndergraduate Student Researcher2011-08 – 2014-02 · 2y 6mo
  9. ChipStackLead Go-to-Market Engineer2025-07 – 2025-11 · 4 mo

Skills

Go-to-Market StrategyVHDLDigital Circuit DesignSystemVerilogVLSIRTL designR&DFormal VerificationTCLFunctional VerificationSoftware DevelopmentProgrammingRTL VerificationDocker ProductsContainerizationJiraArtificial Intelligence (AI)C++MatlabLinux

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